There are widely used EEPROMs capable of being rewritten electrically and maintaining stored data even when the power is off. The EEPROMS are classified into two types; one flash memory type wherein hot electrons are injected to a floating gate, the other is an MONOS (metal oxide nitride oxide semiconductor) or MNOS (metal nitride oxide semiconductor) type wherein electrons are inejcted to an insulating film through FN tunneling or direct tunneling.
On the other side, there have been reported virtual ground array semiconductor memory devices of the flash memory type wherein memory transistors are arranged in an array of which drains and sources are connected between adjacent transistors with no provision of contacts to both of the source and the drain for the small device size. Such memory devices have been disclosed in, for example "A Novel Memory Cell Using Flash Array Contactless EPROM(FACE) Technology", IEDM 1990, pp, 9-94 and "An Asymmetrical Lightly-Dopes Source(ALDS) Cell for Virtual Ground High Density EPROMs", IEEM, 1988, pp. 432-435.
FIG. 6 is an explanatory section showing a portion of one cell of a conventional virtual ground array semiconductor memory device. FIG. 7 illustrates a drive method for this memory device and wherein FIG. 7(a) is an explanatory view illustrating a write mode and FIG. 7(b) is an explanatory view illustrating an erase mode.
The memory cell of the semiconductor memory device shown in FIG. 6 comprises a source region 2, a drain region 3, and a channel region 4 defined between the source region 2 and the drain region 3, these regions 2, 3 and 4 being provided in a semiconductor substrate 1. Further, the memory cell comprises tunnel insulating film 5, floating gate 6, interlayer insulating film 7, and control gate 8, these components being sequentially stacked on the channel region 4.
As shown in FIG. 7(a), in the write mode, a high potential V.sub.pp of about 12 V is applied to the control gate 8 and a high potential V.sub.d of about 6 V to the drain region 3 so that current flow in the device to inject hot electrons to the floating gate 6.
As shown in FIG. 7(b), in the erase mode, a high potential V.sub.s of about 12 V is applied to the source region 2 with the potential of the control gate 8 set at 0 V, so that Fowler-Nordheim (FN) current produced thereby withdraw electrons from the floating gate.
As described above, the conventional virtual ground array semiconductor memory employs a flash-type memory transistor having a floating gate to write on and to read out of. In the flash-type memory transistor, however, since hot electrons are injected with high energy, the trap density of electrons or holes in the oxide film and, increases and, thereby the potential distribution in the oxide film is changed. Consequently, reinjection with positive feedback increases, which may result in destruction of the oxide film.
Further, since drain current is only partially injected to the floating gate, the writing with hot electrons is not efficient, and need a large electric current to be consumed.